Application
Ends in :
Professional Certificate in RTL-to-GDSII IC Design
A 12-week industry-aligned training programme designed to equip aspiring semiconductor engineers with practical skills in Digital IC Design, from foundational concepts through advanced RTL-to-GDSII implementation.
Strengthening local talent for future technology industries.
Registration Deadline: 16 November 2026
Course Details
FULL TIME
3 Month Classroom
18 January 2027 -
27 April 2027
Total up to RM3,000
*Subject to T&C and Availability
ABOUT ASEM
Why Choose ASEM?
Industry-aligned courses in semiconductor IC design, test and packaging, and AI, to ensure students gain practical, job-ready skills.
Access to world-class labs and tools enhances learning, research, and industry readiness.
Partnerships with 100+ companies provide internships, collaborative projects, and direct job opportunities.
Clear pathways to high-demand, well-paying careers with strong job placement support.
International training and research collaborations with top institutions worldwide.
Contribute to Malaysia’s rise as a global tech leader while boosting academic and industry reputation.
Yayasan Peneraju
Approved Learning & Training Institution (ALTI)
The Yayasan Peneraju Approved Learning & Training Institution (ALTI) Programme provides Bumiputera talents with access to industry-relevant training through recognised learning and training institutions. ASEM is officially recognised as an Approved Learning & Training Institution (ALTI) by Yayasan Peneraju, enabling eligible participants to pursue structured semiconductor training programmes aligned with industry needs and professional development pathways.
Through this collaboration, ASEM offers specialised programmes designed to build practical technical capabilities in areas such as Digital IC Design and semiconductor engineering, combining structured learning, hands-on exercises and industry-focused training to prepare participants for careers in Malaysia’s growing semiconductor ecosystem.
Eligibility
Eligibility Criteria
Eligibility:
- Malaysian
- Degree holders in:
- Electronic & Electricals (E&E)
- Electronic Science and Technology
- Communication Engineering
- Microelectronics Science and Engineering
- Computer Engineering
- other electronics-related disciplines
- Unemployed Individuals
Screening Process
- Mini-Exam*: Topics will be as according to the selected program, such as;
- IC Design: Digital Logic, Analog Circuits, and Semiconductor Electronics
- Group interview
Training @ ASEM
Our Programme
RTL-to-GDSII IC Design
Applications Closed
Learning Outcomes
- Demonstrate practical knowledge of the end-to-end IC design workflow, from RTL design to physical design.
- Apply Synopsys and Siemens EDA tools to perform IC design, verification, synthesis and physical design tasks.
- Configure and apply Process Design Kits (PDKs) within an industry-relevant IC design environment.
- Develop and implement an IC design project through the key design stages, targeting tape-out readiness.
- Apply practical technical skills and industry knowledge to pursue career opportunities in IC Design and related semiconductor fields, supported by career placement assistance.
Programme Modules
Digital IC Design — Beginner Level
Opening Ceremony, Industry Introduction, Course Overview
Digital Design Overview, Design Tasks
DMA Protocol, Design Implementation, Introduction to Verilog HDL, FPGA, Hands-on Practice
Logic Synthesis Process, Student Practical Implementation
Verification Tool FM, Procedures, and Operations
DFT Concept, Scan Chain, ATPG, Memory BIST, Circuit Implementation
Floorplan, Power Planning, Placement, Clock Tree, Routing
DRC, ERC, LVS Checks
Flow & Result Analysis
Script Design & Result Analysis
Practical Evaluation and Review
Digital IC Design — Intermediate Level
Subsystem Protocol, Design Implementation, Introduction to Verilog HDL, Hands-on Practice
Logic Synthesis Process, Student Practical Implementation
Verification Tool FM, Procedures, and Operations
DFT Concept, Scan Chain, ATPG, Memory BIST, Circuit Implementation
Floorplan, Power Planning, Placement, Clock Tree, Routing
DRC, ERC, LVS Checks
Flow & Result Analysis
Script Design & Result Analysis
Subsystem Design Evaluation
Digital IC Design — Advanced Level
Introduction of ISA, ARM Overview, CPU Design, Instruction Set, Toolchain
FPGA
Design Implementation and Student Practical Exercises
Logic Synthesis Implementation and Student Practical Exercises
Formal Verification Tools (FM), Processes, and Operation Methods
Concepts and Methods of DFT, Scan Chain Insertion, ATPG, Memory BIST
Floorplan Design, Power Planning, Placement, Clock Tree, and Routing
Design Rule Check (DRC), Electrical Rule Check (ERC), LVS Verification
Input/Output of RC Extraction, Extraction Process, Analysis of RC Parameters
Design of STA Scripts and Result Analysis
Final Evaluation and Review
Pre-Requisites
Students are expected to have basic knowledge and understanding of:
- Semiconductor Devices
- Digital Logic
- Digital Logic Design
- VLSI (Microelectronics)
- Computer Architecture
Potential Career Paths
- Digital IC Design Engineer
- ASIC / SoC Design Engineer
- RTL Design Engineer
- Verification Engineer (VLSI / Digital)
- DFT / Test Engineer
- Physical Design Engineer (Entry-level)
- Semiconductor Design Support / CAD Engineer
- Graduate IC Design Engineer / Trainee VLSI Engineer
Facilities
Facilities Included
Timeline
Your Registration Timeline
Apply to your programme of choice
Submit your application by selecting your preferred programme and completing the required details.
What to expect next:
Eligible applicants will be shortlisted for the entrance examination
Demonstrate your fundamentals
Shortlisted candidates will receive and exam link via email. The assessment evaluates core technical fundamentals relevant to your chosen programme.
What to expect next:
Results will be reviewed, and successful candidates will proceed to the offer stage.
Confirm your placement
Qualified applicants will receive a Letter of Offer via email. This confirms your placement and includes key details on the programme structure and next steps.
Action required:
Accept the offer within the stated timeline to secure your slot.
Prepare for your learning journey
Once confirmed, you'll receive onboarding details including schedules, preparation guidelines, and communication channels.
You're officially in.
Get ready to begin your training and industry exposure.
Frequently Asked Questions
FAQs
- Q: Are accommodation and transportation provided?
A: No. The Yayasan Peneraju financing scheme covers the approved training cost only. Breakfast and lunch will be provided during the training, while accommodation and transportation arrangements are the responsibility of participants. - Q: Is any allowance provided during the training?
A: Eligible participants may receive a stipend of up to RM3,000 under the Yayasan Peneraju collaboration. The stipend is subject to availability and applicable programme terms and conditions.
- Q: Do I need to pay any fees for the programme?
A: The programme is supported through Yayasan Peneraju’s financing scheme for eligible Bumiputera participants. Financing is subject to Yayasan Peneraju’s eligibility requirements, approval process, and applicable terms and conditions. - Q: What does the Yayasan Peneraju financing cover?
A: The approved training fees are covered under the Yayasan Peneraju financing scheme, subject to eligibility and financing approval. Accommodation and transportation are not included. - Q: How do I apply for the financing?
A: Eligible participants will be guided through the Yayasan Peneraju financing application process after receiving an offer to join the programme. Applicants must complete the required documentation and obtain financing approval before enrolment is finalised. - Q: What happens if my financing application is not approved?
A: Programme enrolment is subject to successful financing approval where applicable. ASEM will advise applicants on the next available options based on their application status.
- Q: Do I need to attend the full 3-month of training? Can I skip classes?
A: Attendance is compulsory for the full programme duration. Absences are extremely discouraged.
- Q: Will job placement be provided after completing the training? What is the process?
A: Yes. Upon programme completion, ASEM will proceed with full career placement support by matching participants with suitable hiring partners based on their skills, performance and available job opportunities. Participants may be required to attend interviews with potential employers as part of the placement process. - Q: What happens if I secure a job before the programme is completed?
A: Please inform ASEM as soon as possible. Participants are still expected to complete the programme unless otherwise advised, as successful programme completion may be part of the programme requirements. - Q: If I am shortlisted by an employer, do I still need to attend their interview even though I have already interviewed with ASEM?
A: Yes. The ASEM interview is for programme admission and assessment purposes. Employer interviews are separate and form part of the job placement process. - Q: Is job placement guaranteed?
A: ASEM will provide full placement support and connect participants with relevant hiring opportunities. Final hiring decisions remain subject to the employer’s selection process, interview performance and available vacancies.
Venue
Advanced Semiconductor Academy of Malaysia
Level 2, CoPlace 9
Block 2320, Century Square, Jalan Usahawan, Off,
Persiaran Multimedia, Cyberjaya, Selangor
63000
Malaysia
Applications are now closed.
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