GSEP
Global Semiconductor Exchange Program
A 2-month immersive training program conducted abroad at Shenzhen, China with top-tier international semiconductor companies.
NOW OPEN: August 2025 Intake
Course Details
FULL TIME
2 Months
4 August — 30 September 2025
ASEM, Malaysia
ABOUT ASEM
Why Choose ASEM?
Industry-aligned courses in semiconductor IC design, test and packaging, and AI, to ensure students gain practical, job-ready skills.
Access to world-class labs and tools enhances learning, research, and industry readiness.
Partnerships with 100+ companies provide internships, collaborative projects, and direct job opportunities.
Clear pathways to high-demand, well-paying careers with strong job placement support.
International training and research collaborations with top institutions worldwide.
Contribute to Malaysia’s rise as a global tech leader while boosting academic and industry reputation.
Eligibility
Who Can Apply?
- Undergraduates and fresh graduates in:
- Electronic Information Engineering, Electronic Science and Technology
- Communication Engineering
- Microelectronics Science and Engineering
- Optoelectronic Information Science and Engineering
- Information Engineering, Integrated Circuit Design and Integrated Systems
- Electronic Information Science and Technology
- other electronics-related disciplines
- Newly employed individuals eager to enhance their semiconductor knowledge.
Prerequisites
- Foundational knowledge in electronics, including digital circuits, analog circuits, and signal processing.
- Understanding of basic components such as transistors, diodes, and FETs (Field-Effect Transistors).
- Familiarity with IC design rules.
- Completion of an assessment evaluating knowledge of semiconductor concepts.
Program Deposit Details
- Deposit: RM3,000 (Refundable upon securing a job within 90 days after program completion)
- Course Fee: Fully sponsored (worth RM60,000)
- Insurance: RM230 (self-paid)
- Visa Fee: RM110 (self-paid)
- Bonding: 3 years with companies at Malaysia Semiconductor IC Design Park
- Bond Breach/ Dropout Penalty: Full repayment of the RM60,000 course fee
Eligibility Criteria
Training @ ASEM
What Do We Teach & Learning Outcomes
🔰 Beginner Level
- Introduction to Integrated Circuit Process
- Layout Overview
- Analog Layout Matching
- Usage of Analog Design Tools
- Usage of Layout Verification Tools
- Layout Design Project Practice
- Final Exam
🛠️ Intermediate Level
- OP Analog Layout Design Practice
- CMP Analog Layout Design Practice
- LPF Analog Layout Design Practice
- OSC Analog Layout Design Practice
- ESD Protection Circuit Analog Layout Design Practice
- Final Exam
🔬 Advanced Level
- LDO Chip Front-End Design
- LDO Chip Layout Design
- LDO Chip Parameter Extraction and Post-Simulation
- LDO Chip Physical Verification
- Final Exam
🔰 Beginner Level
Understand the IC fabrication process and its impact on layout design
Identify the basic principles of analog layout, including matching techniques
Navigate and use analog layout design tools (e.g., Virtuoso, Laker, etc.)
Perform layout verification using standard tools (e.g., DRC, LVS)
Apply learned skills in a basic layout project
Demonstrate foundational knowledge through a practical exam
🛠️ Intermediate Level
Independently design and lay out operational amplifiers (OP)
Complete layout designs for common analog building blocks like CMPs, LPFs, and OSCs
Integrate ESD protection into analog layouts
Apply matching, symmetry, and parasitic-aware design strategies
Execute intermediate-level analog layout designs with improved efficiency and accuracy
Validate designs through a hands-on final assessment
🔬 Advanced Level
Design a Low Dropout Regulator (LDO) chip from front-end schematic to layout
Perform parameter extraction and post-layout simulations to validate design performance
Conduct physical verification (DRC, LVS, ERC) to ensure design manufacturability
Understand and execute industry-grade full-chip layout workflows
Complete a capstone LDO layout project demonstrating end-to-end design capability
Pass a comprehensive final exam reflecting advanced-level proficiency
Facilities
Facilities Included
Career Path
Your Career Path
The Global Semiconductor Exchange Program (GSEP) equips you with the skills and experience needed to thrive in the semiconductor industry.
Through immersive training with global experts, you’ll develop a strong foundation in IC design, verification, and automation.
This program opens doors to high-demand roles, providing the technical expertise and industry exposure necessary for long-term career growth in the evolving semiconductor landscape.
Frequently Asked Questions
GSEP FAQs
- Q: What expenses are covered and sponsored for the GSEP program in Shenzhen?
A: The program covers the training course, round-trip flight tickets to Shenzhen, accommodation at the university (twin-sharing room with an attached toilet), meals (three per day, seven days a week), and a visa to China. (Passport fees are not included.)
- Q: Are there any allowances?
A: No, allowances are not provided.
- Q: What is the process for obtaining a China visa?
A: We will assist with the visa application process. If required, you must be available to visit the Chinese Embassy with us at least six weeks before the departure date. Please ensure your passport is ready and remains valid for at least six months beyond the program's end date. For example, if the program ends in July 2025, your passport should be valid until at least February 2026.
- Q: What is the application process for GSEP?
A: Applicants must first sign up via the provided form. They will then be scheduled for an exam, and those who pass will proceed to an interview.
- Q: What does the mini exam include, and how should we prepare?
A: The mini exam consists of both objective and subjective questions, covering fundamental topics in IC Design with Test and Verification.
- Q: How will the interview be conducted?
A: The interview will be held online as a group interview. During this session, we aim to learn more about you, including your educational background, job-seeking status, passion for the field, leadership roles in projects, and overall communication skills. Additionally, we will assess your commitment to full attendance throughout the program.
- Q: On which days do we need to attend the program? Is it only on weekdays or does it include weekends?
A: The program will be conducted on weekdays only. However, if a public holiday falls on a weekday, a replacement session may be scheduled on a weekend if necessary.
- Q: Will job placement be provided after completing the training and what is the process?
A: Yes, we will assist with job placement. You will need to apply for your desired job through our job portal, and we will forward your application to the respective company.
- Q: If I am shortlisted by an employer, do I still need to attend their interview even though I have already interviewed with ASEM?
A: Yes, you must attend the employer’s interview for job placement. The interview conducted by ASEM is solely for admission into the training program and selecting top candidates.
- Q: If I am not selected for this intake, can I apply for another intake or a different program? Will I need to retake the exam and interview?
A: Yes, you can apply for a new intake or a different program. Whether you need to retake the exam and interview will depend on the specific program you are applying for and the intake you are joining, as program modules and enrollment requirements may change.
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